Education

PhD in Electrical & Computer Engineering Expected 2028
University of Massachusetts Amherst • Amherst, MA
Teaching Assistant: ECE 304 (Junior Design Project), ECE 361 (Fundamentals of Electrical Engineering)
BE in Electrical Engineering & Minor in Computer Science Graduated 2023
National University of Sciences and Technology •
Capstone: Logic-Locking Security Evaluation - End-to-end pipeline for security-cost tradeoffs of hardware obfuscation on RISC-V designs. Funded Project: Multi-Agent Aerial Swarm - Grant-funded research on event-driven, low-latency control for multi-UAV swarms.

Experience

Graduate Research Assistant September 2023 - Present
Khwarizmi Lab, University of Massachusetts Amherst • Amherst, MA
  • Built a verification framework to analyze quantum key distribution (QKD) protocols; identified four new vulnerabilities arising from quantum-classical interactions
  • Applied formal analysis to U.S. ACH banking systems to uncover security vulnerabilities in the access control and authorization of ACH direct payments
Undergraduate Research Assistant September 2022 - July 2023
Communication Systems and Networks Lab, NUST •
  • Collaborated in the design and implementation of an event-driven coordination protocol for multi-agent aerial swarms on Raspberry Pi companion computers with Pixhawk/ArduPilot flight controllers
  • Designed and optimized leader-follower formation control (flock, line, helical) with dynamic reconfiguration, achieving under 2 min formation-switching latency
  • Engineered a mesh networking stack (IEEE 802.11, UDP/TCP, MAVLink) to enable fault-tolerant communication for control coordination in real-time (under 100 ms latency)
Hardware Security Intern June 2022 - September 2022
IC Design Lab, NUST •
  • Led the design of ENIGMA, a Python framework that automatically inserts logic-locking defenses into hardware designs, protecting IP designs from unauthorized use and reverse engineering
  • Designed a parametrized key-insertion system (64-256 bits) with user-defined cell libraries to analyze the impact of logic obfuscation on a chip's area, delay, and power
Machine Learning Intern June 2021 - September 2021
TUKL Deep Learning Lab, NUST •
  • Implemented an automated pipeline to extract, structure, and preprocess raw court documents
  • Fine-tuned Transformer-based models for court-case outcome prediction achieving 83% accuracy

Skills

Programming Languages
Python C/C++ Julia Rust JavaScript Kotlin MATLAB
Generative AI/ML
Huggingface Transformers PyTorch TensorFlow Keras SFT DPO RLHF RL-Automated Feedback LoRA QLoRA RAG Agentic AI Specification-Aware Fine-Tuning
Formal Methods
Symbolic Execution Linear Temporal Logic (LTL) Finite State Automata (FSA) Model Checking SMT encoding TLA+ nuXMV STORM Coq Lean
DevOps & Cloud
Git/GitHub Docker Shell Scripting CMake AWS (EC2 Route 53) MongoDB N8N

Awards & Honors

Rector's Gold Medal 2023
Awarded for best senior project, National University of Sciences & Technology
2nd Place, CSAW'22 Logic Locking Competition 2022
Global security hackathon competition, NYU School of Engineering

Interests

Reading books (fiction and non-fiction) Learning to play the guitar DIY projects (building with salvaged electronics and repairing old devices) Budding coffee connoisseur